SIMULATION METHODOLOGY FOR ANALYZING THE PERFORMANCE OF TFET THROUGH THM-TFET MODEL FILE IN CADENCE
Keywords:
TFET, DG-TFET, THM-TFETAbstract
MOSFETs are used to create the majority of real-time devices at present due to their fast-switching times. MOSFET subthreshold swing scaling cannot be 60mV/decade lowered. Because of its low subthreshold swing and low leakage current, tunnel FET (TFET) is a viable MOSFET substitute. This paper shows the simulation of the TFET inverter using cadence virtuoso by using the model file called THM-TFET, it is Verilog-A coded and used for the DC and AC simulations of Tunnel FET(TFET)
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