PERFORMANCE ASSESSMENT OF III-V HETEROJUNCTION FINFETS AT 14nm GATE LENGTH

Authors

  • Pooja Sharma ECE department, Guru Nanak Dev Engineering College, Ludhiana, India
  • Navneet Kaur ECE department, Guru Nanak Dev Engineering College, Ludhiana, India
  • Gurpurneet Kaur ECE department, Guru Nanak Dev Engineering College, Ludhiana, India

Keywords:

FinFET, heterojunction, Subthreshold swing, fin height, TCAD

Abstract

Fin shaped field effect transistors have become prominent candidate in high-performance processors of leading semiconductor industries. It is owing to the fact that thin fin of structure and presence of gates on multiple sides increase electrostatic integrity. Objective of the present work is to design FinFET for gate length of 14nm and analyse performance parameters for different channel materials. Fin width and fin height of device is set as 7nm and 12nm; 25nm and 30nm respectively. Channel of FinFET has been structured with III-V type materials such as AlGaAs,  InGaAs and InP. Cogenda Visual TCAD tool has been used for accurate design and extensive  simulations of FinFET. Performance has been investigated in terms of on-current (Ion), leakage  current (Ioff) and subthreshold swing (SS) for applied drain voltage and gate voltage. These  parameters have been extracted from current-voltage characteristics of the device. Ion/Ioff is of  the order 107, Ioff is of the order 10-14 and SS is around 80mV/dec for InP material. Based on  performance comparison, it is noted that superior performance is achieved in case of InP material  as compared to other materials. 

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Published

2023-12-30

How to Cite

PERFORMANCE ASSESSMENT OF III-V HETEROJUNCTION FINFETS AT 14nm GATE LENGTH . (2023). JOURNAL PUNJAB ACADEMY OF SCIENCES, 23, 296-301. https://jpas.in/index.php/home/article/view/78

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